m52s128168a-7tig Elite Semiconductor Memory Technology Inc., m52s128168a-7tig Datasheet - Page 4

• Manufacturer Part Number: m52s128168a-7tig
• Description: 2m X 16 Bit X 4 Banks Synchronous Dram
• Manufacturer: Elite Semiconductor Memory Technology Inc.

ESMT
DC CHARACTERISTICS
Recommended operating condition unless otherwise noted，TA = 0 to 70 C
Elite Semiconductor Memory Technology Inc.
Operating Current
(One Bank Active)
Precharge Standby
Current in power-down
mode
Precharge Standby
Current in non
power-down mode
Active Standby Current
in power-down mode
Active Standby Current
in non power-down
mode
(One Bank Active)
Operating Current
(Burst Mode)
Refresh Current
Parameter
Symbol
I
I
I
I
I
I
I
I
I
I
I
I
CC0
CC2P
CC2PS
CC2N
CC2NS
CC3P
CC3PS
CC3N
CC3NS
CC4R
CC4W
CC5
All banks idle,
CKE = Low, /CS = High, t
control inputs are switching, data input signals are
stable
One bank active,
BL=4, t
I
data changing each burst
One bank active,
All banks idle,
CKE = Low, CS = High, t
/t
switching, data input signals are stable
One bank active,
CKE = Low, CS = High, t
control inputs are switching, data input signals are
stable
One bank active,
CKE = Low, CS = High, t
/t
switching, data input signals are stable
OUT
BL=4, t
I
data changing each burst
t
/CS = High between valid commands, address
inputs are switching, data input signals are stable
All banks idle,
CKE = Low, /CS = High, t
control inputs are switching, data input signals are
stable
All banks idle,
CKE = Low, /CS = High, t
/t
switching, data input signals are stable
One bank active,
CKE = Low, CS = High, t
control inputs are switching, data input signals are
stable
One bank active,
CKE = Low, CS = High, t
/t
switching, data input signals are stable
Burst refresh,
t
address inputs are switching, data input signals
are stable
RC
OUT
RC
CK
CK
CK
CK
= t
= t
= 0 mA, address inputs are switching, 50%
(min) =High, address & control inputs are
(min) =High, address & control inputs are
(min) =High, address & control inputs are
(min) =High, address & control inputs are
= 0 mA, address inputs are switching, 50%
RC
RC
Preliminary
CK
CK
(min), t
(min), t
= t
= t
CK
CK
CK
CK
Test Condition
(min), continuous read bursts,
= t
(min), continuous write bursts,
= t
CK
CK
(min), CKE = High,
(min), CKE = High,
CK
CK
CK
CK
CK
CK
CK
CK
= Low,
= t
= Low,
= t
= Low,
= t
= t
= Low,
CK
CK
CK
CK
(min), address &
(min), address &
(min), address &
(min), address &
°
Revision : 1.4
Publication Date : Sep. 2008
-7.5
60
28
28
45
25
90
90
75
Version
0.5
0.5
5
2
M53D128168A
-10
50
22
22
35
20
75
75
60
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
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