m52s64164a Elite Semiconductor Memory Technology Inc., m52s64164a Datasheet - Page 14

• Manufacturer Part Number: m52s64164a
• Description: 1m X 16 Bit X 4 Banks Synchronous Dram
• Manufacturer: Elite Semiconductor Memory Technology Inc.

ESMT
COMMANDS
Mode register set command
command, A0 through A11, BA0 and BA1 are the data input pins. After power on, the
mode register set command must be executed to initialize the device.
(t
Extended Mode register set command
DS.
Activate command
address selected by A0 through A11.
Elite Semiconductor Memory Technology Inc.
MRD
The DRAM has a mode register that defines how the device operates. In this
The mode register can be set only when all banks are in idle state. During 2CLK
The DRAM has a extended mode register that defines how to set PASR, TCSR,
The DRAM has four banks, each with 4,096 rows.
This command activates the bank selected by BA1 and BA0 (BS) and a row
This command corresponds to a conventional DRAM’s RAS falling.
) following this command, the DRAM cannot accept any other commands.
(
( CS , RAS , CAS , WE , BA0 = Low ; BA1= High)
( CS , RAS = Low, CAS , WE = High)
CS
,
RAS
,
CAS
,
WE
,
BA1, BA0 = Low)
Publication Date: Sep. 2008
Revision: 1.4
M52S64164A
14/47