ep1m120 Altera Corporation, ep1m120 Datasheet - Page 40

• Manufacturer Part Number: ep1m120
• Description: Programmable Logic Device Family
• Manufacturer: Altera Corporation

Mercury Programmable Logic Device Family Data Sheet
40
Input/Output Clock Mode
An ESB using input/output clock mode can also use up to four clocks. On
each of the two ports, A or B, one clock controls all registers for inputs into
the ESB: data input, WE, RE, read address, and write address. The other
clock controls the ESB data output registers. Each ESB port, A or B, also
supports independent read clock enable, write clock enable, and
asynchronous clear signals. Input/output clock mode is commonly used
for applications where the reads and writes occur at the same system
frequency, but require different clock enable signals for the input and
output registers.
Figure 20
shows the ESB in input/output clock mode.
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