ep1m120 Altera Corporation, ep1m120 Datasheet - Page 58

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ep1m120

Manufacturer Part Number
ep1m120
Description
Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet

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Mercury Programmable Logic Device Family Data Sheet
58
For the HSDI I/O band, half of the dedicated banks support LVDS, 3.3-V
PCML or LVPECL, and receiver inputs, while the other half support
LVDS, PCML or LVPECL, and transmitter outputs. A single device can
support 1.5-V, 1.8-V, 2.5-V, and 3.3-V interfaces; each bank can support a
V
level so that each bank can support any of the terminated standards (such
as SSTL-3) independently. A bank can support a single V
bank contains a fixed VREF pin for voltage referenced standards. This pin
can be used as a regular I/O if a V
the number of I/O banks in each Mercury device.
Each bank can support multiple standards with the same V
pins. For EP1M120 devices, each bank can support one voltage-referenced
I/O standard, but can support multiple I/O standards with the same
V
can support LVTTL, LVCMOS, 3.3-V PCI, and SSTL-3 for inputs and
outputs.
EP1M350 devices, each bank can support two voltage-reverenced I/O
standards; each I/O bank is split into two voltage-referenced sub-banks.
When using the two HSDI transmitter banks as regular I/O banks in a
non-HSDI mode, those two banks require the same V
each HSDI transmitter bank supports its own V
Table 13. Number of I/O Banks per Device
CCIO
CCIO
standard independently. Each bank can also use a separate V
and V
EP1M120
EP1M350
Device
Figure 30
REF
voltage levels. For example, when V
shows the I/O bank layout for an EP1M120 device. For
Regular I/O Banks
REF
12
8
standard is not used.
REF
HSDI Band I/O Banks
level.
CCIO
CCIO
Altera Corporation
REF
level. However,
Table 13
CCIO
is 3.3 V, a bank
4
4
level. Each
for output
shows
REF

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