ep1m120 Altera Corporation, ep1m120 Datasheet - Page 49

• Manufacturer Part Number: ep1m120
• Description: Programmable Logic Device Family
• Manufacturer: Altera Corporation

Altera Corporation
Figure 26. Mercury IOE
Note to
(1)
Interconnect
Column and
Column
Priority
Local Interconnect
Associated LAB
This programmable delay has four settings: off and three levels of delay.
Figure
Local Fast
Two Row
Signals
26:
Six Fast
Signals
Global
Dedicated
Clocks
Four
Double Data Rate I/O
Mercury device’s have three register IOEs to support the DDRIO feature,
which makes double data rate interfaces possible by clocking data on both
positive and negative clock edges. The IOE in Mercury devices supports
double data rate input and double data rate output modes.
Chip-Wide Reset
Output Register
Input Register
OE Register
CLRN/PRN
CLRN/PRN
CLRN/PRN
D
ENA
D
ENA
D
ENA
Mercury Programmable Logic Device Family Data Sheet
Q
Q
Q
Priority Row Interconnect (for Associated LAB Row)
Row Interconnect (for Associated LAB Row)
Drive Strength Control
Open-Drain Output
Propagation Delay
Slew Control
Output t
Output
Delay
Input Pin to Input
Register Delay
Core Delay (1)
Input Pin to
ZX
OE Register
t
CO
Delay
VCCIO
VCCIO
Optional
PCI Clamp
Bus-Hold
Circuit
Programmable
Pull-Up
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