ep1m120 Altera Corporation, ep1m120 Datasheet - Page 84

• Manufacturer Part Number: ep1m120
• Description: Programmable Logic Device Family
• Manufacturer: Altera Corporation

Mercury Programmable Logic Device Family Data Sheet
Device Pin-
Outs
84
Configuration device
Passive serial (PS)
Passive parallel asynchronous (PPA)
Passive parallel synchronous (PPS)
JTAG
Table 52. Data Sources for Configuration
f
Configuration Scheme
Before and during device configuration, all I/O pins are pulled to V
by a built-in weak pull-up resistor.
SRAM configuration elements allow Mercury devices to be reconfigured
in-circuit by loading new configuration data into the device. Real-time
reconfiguration is performed by forcing the device into command mode
with a device pin, loading different configuration data, reinitializing the
device, and resuming user-mode operation. In-field upgrades can be
performed by distributing new configuration files.
Configuration Schemes
The configuration data for a Mercury device can be loaded with one of five
configuration schemes (see
application. A configuration device, intelligent controller, or the JTAG
port can be used to control the configuration of a Mercury device. When a
configuration device is used, the system can configure automatically at
system power-up.
By connecting the configuration enable (nCE) and configuration enable
output (nCEO) pins on each device, multiple Mercury devices can be
configured in any of five configuration schemes.
For more information on configuration, see
(Configuring APEX 20K, FLEX 10K & FLEX 6000
See the Altera web site (http://www.altera.com) or the Altera Digital
Library for pin-out information.
Configuration device
MasterBlaster
or serial data source
Parallel data source
Parallel data source
MasterBlaster or ByteBlasterMV download cable or a
microprocessor with a Jam STAPL or JBC file
Table
52), chosen on the basis of the target
TM
or ByteBlasterMV
Data Source
Application Note 116
Devices).
TM
Altera Corporation
download cable
CCIO