txc-03456 TranSwitch Corporation, txc-03456 Datasheet - Page 27

• Manufacturer Part Number: txc-03456
• Description: Device Level Mapper
• Manufacturer: TranSwitch Corporation

Drop clock period
Duty cycle, t
Data set up time for DCLK
Data hold time after DCLK
DSPE set up time for DCLK
DSPE hold time after DCLK
DPAR set up time for DCLK
DPAR hold time after DCLK
DC1J1 set up time for DCLK
DC1J1 hold time after DCLK
Note: The relationship between J1 and the SPE signals is shown for illustration purposes only, and will
DD7-DD0
(INPUT)
(INPUT)
(INPUT)
(INPUT)
DC1J1
DSPE
DCLK
PWH
be a function of the pointer offset. For the AU-4/STS-3c format there will be one J1 pulse, which
indicates the start of the VC-4 that carries the 140 Mbit/s POH bytes and payload. The C1 pulse is
shown dotted because the C1 pulse may be provided on the DC1 signal lead. If the DC1 signal
lead is not used it must be grounded. When the pointer tracking machine is selected, the J1 pulse
and SPE signal are not required. The DPAR signal is not shown.
Parameter
/t
CYC
t
SU(3)
C1(1)
C1(3)
t
H(3)
t
C1(2)
Figure 8. Drop Bus Interface Timing
SU(1)
t
C1(3)
SU(2)
not shown
not shown
Symbol
t
t
t
t
t
t
SU(1)
t
SU(2)
t
SU(4)
SU(4)
SU(3)
t
CYC
H(1)
H(2)
H(3)
t
H(1)
DATA
t
PWH
DATA SHEET
- 27 -
t
H(2)
t
DATA
CYC
15.0
Min
4.0
7.0
4.0
3.0
7.0
4.0
7.0
40
DATA
J1
J1
51.44
Typ
50
DATA
DATA
Max
60
Ed. 1A, January 2000
DATA
TXC-03456
TXC-03456-MB
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
L4M