txc-03456 TranSwitch Corporation, txc-03456 Datasheet - Page 78

• Manufacturer Part Number: txc-03456
• Description: Device Level Mapper
• Manufacturer: TranSwitch Corporation

Address
1D
1E
1F
7-0
7-0
Bit
0
Symbol
P Control
PLDINV
S-Bits
C1
Pointer S-bit Microprocessor-Written Values: The bits in this location
are the microprocessor-written S-bits in the transmit pointer bytes, and
the S-bits used in the receive pointer tracking machine. The transmit
S-bits in this location are enabled when control bits TPSSEL and
TOHOUT are 1. In the receive direction, the S-bits in this location are
enabled when control bit RPSSEL is 1 and RPSDS is 0.
The bits are defined as:
Bit 7 is the S-bit state in bit 5 in the transmitted H11 byte.
Bit 6 is the S-bit state in bit 6 in the transmitted H11 byte.
Bit 5 is the S-bit state in bit 5 in the transmitted H12 byte.
Bit 4 is the S-bit state in bit 6 in the transmitted H12 byte.
Bit 3 is the S-bit state in bit 5 in the transmitted H13 byte.
Bit 2 is the S-bit state in bit 6 in the transmitted H13 byte.
Bit 1 is the S-bit state used to compare bit 5 in the received
Bit 0 is the S-bit state used to compare bit 6 in the received
C1 Microprocessor-Written Value: When control bits TOHOUT and
UPC1 are equal to 1, the transmitted C1 value is the value written into
this location by the microprocessor. When control bit TOHOUT is a 1
and UPC1 is a 0, a fixed value of 01H is transmitted, and this register
location is disabled.
Phase-Locked Loop Detector Invert Control Bit: A 1 inverts the
sense of one of the phase-locked loop internal phase detector’s inputs.
This bit should be set to 1 for normal operation.
H11 byte in the pointer state machine.
H11 byte in the pointer state machine.
DATA SHEET
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Description
Ed. 1A, January 2000
TXC-03456
TXC-03456-MB
L4M