l-fw322-06-db ETC-unknow, l-fw322-06-db Datasheet - Page 6

• Manufacturer Part Number: l-fw322-06-db
• Description: Phy/link Open Host Controller Interface
• Manufacturer: ETC-unknow

FW322 06 1394a
PCI PHY/Link Open Host Controller Interface
Features
Other Features
FW322 Functional Overview
The FW322 is a high-performance, PCI bus-based open host controller designed by Agere Systems Inc. for imple-
mentation of 1394a-2000 compliant systems and devices. Link-layer functions are handled by the FW322, utilizing
the on-chip 1394a-2000 compliant link core and physical layer core. A high-performance and cost-effective solution
for connecting and servicing multiple 1394 (both 1394-1995 and 1394a-2000) peripheral devices can be realized
using this PHY/link OHCI device.
FW322 Functional Description
The FW322 is comprised of four major functional sections (see Figure 1): PCI core, OHCI isochronous and
asynchronous data transfer, link core, and PHY core. The following is a general description of each of the major
sections.
6 6
PCI:
— Revision 2.2 compliant
— 33 MHz/32-bit operation
— Programmable burst size thresholds for PCI data transfer
— Supports optimized memory read line, memory read multiple, and memory write invalidate burst commands
— Supports PCI Bus Power Management Interface Specification v.1.1, including D3cold wakeups
— Supports CLKRUN# protocol per PCI Mobile Design Guide
— Supports Mini PCI Specification v1.0, including Mini PCI power requirements
— Global byte swap function
— CardBus support per PC Card Standard Release 8.0, including 128 bytes of on-chip tuple memory
I
CMOS process
3.3 V operation, 5 V tolerant inputs
120-pin TQFP package
NAND tree test mode
2
C serial ROM interface
(continued)
BUS
PCI
ROM
I/F
CORE
PCI
Figure 1. FW322 Conceptual Block Diagram
ASYNCHRONOUS
ISOCHRONOUS
TRANSFER
TRANSFER
DATA
DATA
OHCI
OHCI
CORE
LINK
CORE
PHY
CABLE PORT 1
CABLE PORT 0
Data Sheet, Rev. 1
December 2005
Agere Systems Inc.
5-6250 (F).f