tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 440

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
19 VT/TU Mapper Functional Description
19.13 Receive Lower-Order Path Overhead (RX_LOPOH)
The RX_LOPOH logic block (in
the overhead associated with each VT/TU, specifically, V5, J2, Z6/N2, Z7/K4, and the O bits. The following features
will be implemented:
Note: The number of valid bits transmitted is dependent upon the VT/TU group types. i.e., full VT2 equals 168 bits.
All data types must be transmitted within 500 µs.
Table 557. Data Type Header Definitions
* All overhead bytes will be transmitted from MSB to LSB.
† O bits are received in the byte following J2 and the byte following Z6/N2 in asynchronous mode. The O bits will be transmitted i n the order of
19.14 VT/TU Mapper Transmit Path Requirements
This section describes all necessary functions of the transmit logic (see
440
Figure 45 on pag
which they are received within a VT, starting with the MSB of the nibble following the J2 byte.
V5, J2, Z6/N2, Z7/K4, and the 0 bits, on a per VT basis, are stored for one complete superframe and transmitted
during the next superframe. REI and RDI values received from the SPEMPR and TMUX are stored on a per-
frame basis and transmitted during the next frame. REI and RDI values are latched during the A1 time of the of
the received SONET frame.
When operating in UPSR mode (bit VT_UPSR = 1 (
bytes will be modified based on the receive status. See
ments.
The REI and RDI received from the SPEMPR and TMUX blocks is the first data type transmitted in each frame
as a burst of 34 bits on the rising edge of the SPE mapper Rx clock (6.48 MHz). All other data types are transmit-
ted as a burst of 224 bits on the rising edge of the SPE mapper Rx clock.
The first frame of the four frame multiframe contains data types 001, 010, 011, and 100, respectively. The second
frame of the multiframe contains data types 001, 101, and 110, respectively. The remaining frames contain only
data type 001. Data type headers will be defined as shown in
Input selector (INSEL)
Transmit elastic store (TES)
Virtual tributary generator (VTGEN)
Virtual tributary multiplexer (VTMUX)
Transmit DS1/E1 signaling (TX_VTSIG)
Transmit low-order path overhead (TX_LOPOH)
0
0
0
0
1
1
1
1
Header
e452, contains the RX_LOPOH block serial channel format and timing.
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Figure 39 on page429
Reserved.
TMUX and SPE mapper RDI/REI.
V5 byte, 28/21 bytes starting with VT 1*.
J2 byte, 28/21 bytes starting with VT 1.
Z6/N2 byte, 28/21 bytes starting with VT 1.
Z7/K4 byte, 28/21 bytes starting with VT 1.
O bits, 28/21 bytes starting with VT 1
Reserved. Data will be ignored.
Table
) will perform all necessary functions to store and transmit
(continued)
Table 561 on page444
173)), REI, RDI, and ERDI values in the V5 and Z7
Table 557
Description
Figure 39 on page429
below.
†
.
for automatic generation require-
, left to right).
Agere Systems Inc.
May 2001