tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 71

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

May 2001
7 Microprocessor Interface and Global Control and Status Registers
Table 71. SMPR_CPCR, Clock and Power Control Register (RW)
Table 72. SMPR_PMRCHR, PM Reset Count High Register (RW)
Agere Systems Inc.
Address
0x00016 15:11
Address
0x00014
10:0 SMPR_PMRESET_HIGH_COUNT[10:0] Performance Monitor Counter Preset. The
Bit
15:9
Bit
8
7
6
5
4
3
2
1
0
SMPR_SPEMPR_RCLK SPE Mapper Rx Clock Enable.
SMPR_SPEMPR_TCLK SPE Mapper Tx Clock Enable.
SMPR_VTMPR_RCLK
SMPR_VTMPR_TCLK
SMPR_TMUX_RCLK
SMPR_TMUX_TCLK
SMPR_M13_RCLK
SMPR_M13_TCLK
SMPR_DJA_CLK
Name
—
Name
—
Reserved.
M13 MUX/Tx Clock Enable.
0 = M13 MUX/Tx clock is powered down and inactive.
1 = M13 MUX/Tx clock is powered up and active.
M13 DeMUX Rx Clock Enable.
0 = M13 deMUX/Rx clock is powered down and inactive.
1 = M13 deMUX/Rx clock is powered up and active.
Digital Jitter Attenuation Clock Enable.
0 = DJA DPLL is powered down and inactive.
1 = DJA DPLL is powered up and active.
VT Mapper Tx Clock Enable.
0 = VT mapper Tx clock is powered down and inactive.
1 = VT mapper Tx clock is powered up and active.
VT Mapper Rx Clock Enable.
0 = VT mapper Rx clock is powered and inactive.
1 = VT mapper Rx clock is powered up and active.
0 = SPE mapper Tx clock is powered down and inactive.
1 = SPE mapper Tx clock is powered up and active.
0 = SPE mapper Rx clock is powered down and inactive.
1 = SPE mapper Rx clock is powered up and active.
TMUX Tx Clock Enable.
0 = TMUX Tx clock is powered down and inactive.
1 = TMUX Tx clock is powered up and active.
TMUX Rx Clock Enable.
0 = TMUX Rx clock is powered down and inactive.
1 = TMUX Rx clock is powered up and active.
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Reserved.
preset value of this register determines the
frequency of the internal PM counter. User
should preload an appropriate value based
on the microprocessor interface clock rate in
order to reach the desired PMRST rate.
Function
Function
(continued)
Default
0x01F8
Default
0x0000
Reset
Reset
71