nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 101

• Manufacturer Part Number: nrf24le1-f16q48-t
• Description: Ultra-low Power Wireless System On-chip Solution
• Manufacturer: ETC-unknow

nRF24LE1 Preliminary Product Specification
10.3
The following register controls the Watchdog.
After a reset, the default state of the Watchdog is disabled. The Watchdog is activated when both bytes in
WDSV have been written to LSB first. The watchdog counter then counts down towards 0, and when 0 is
reached the complete microcontroller is reset. The watchdog must be restarted by a new write to WDSV.
To avoid the reset, the software must load new values into the watchdog register sufficiently often.
The watchdog can only be disabled (reset) by a system reset, or possibly when the chip enters the Regis-
ter retention and Memory retention power saving modes.
Revision 1.1
Address
(Hex)
0xAF
watchdogStartValue
Functional description
Name/Mnemonic
WDSV
15:0
Bit
Table 55. Watchdog register
Reset value
0x0000
101 of 191
Type
R/W Watchdog start value register.
Contains the Watchdog timer’s initial
value. If the register is loaded with
0x0000, a maximum Watchdog timeout
interval is used, the Watchdog is not dis-
abled.
LSB is always written or read first, then
MSB. The LSB/MSB write and read
pointers are separate. After a read
access the write pointer will always point
at LSB. After a write access the read
pointer will always point at LSB.
Description