nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 90

• Manufacturer Part Number: nrf24le1-f16q48-t
• Description: Ultra-low Power Wireless System On-chip Solution
• Manufacturer: ETC-unknow

nRF24LE1 Preliminary Product Specification
The tf0, tf1 (timer 0 and timer 1 overflow flags), ie0 and ie1 (external interrupt 0 and 1 flags) are automati-
cally cleared by hardware when the corresponding service routine is called.
8.4.2
TMOD register is used for configuration of Timer 0 and Timer1.
8.4.3
These registers reflect the state of Timer 0. TH0 holds higher byte and TL0 holds lower byte. Timer 0 can
be configured to operate as either a timer or a counter.
8.4.4
These registers reflect the state of Timer 1. TH1 holds higher byte and TL1 holds lower byte. Timer 1 can
be configured to operate as either timer or counter.
Revision 1.1
Address
0x89
Timer0 – TH0, TL0
Timer1 – TH1, TL1
Timer mode register - TMOD
Reset
value
0x00
Bit Name
5-4 mode1 Timer 1 mode
1-0 mode0 Timer 0 mode
7
6
3
2
gate1 Timer 1 gate control
gate0 Timer 0 gate control
ct1
ct0
Address
Address
0x8B
0x8D
Table 38. Timer 0 register (TH0:TL0)
Table 39. Timer 1 register (TH1:TL1)
Timer 1 counter/timer select. 1: Counter, 0: Timer
00 – Mode 0: 13-bit counter/timer
01 – Mode 1: 16-bit counter/timer
10 – Mode 2: 8-bit auto-reload timer
11 – Mode 3: Timer 1 stopped
Timer 0 counter/timer select. 1: Counter, 0: Timer
00 – Mode 0: 13-bit counter/timer
01 – Mode 1: 16-bit counter/timer
10 – Mode 2: 8-bit auto-reload timer
11 – Mode 3: two 8-bit timers/counters
0x8A
0x8C
Table 37. TMOD register
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Register name
Register name
TL0
TH0
TL1
TH1
Description