nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 159

• Manufacturer Part Number: nrf24le1-f16q48-t
• Description: Ultra-low Power Wireless System On-chip Solution
• Manufacturer: ETC-unknow

nRF24LE1 Preliminary Product Specification
The 2-Wire is enabled by setting W2CON0.0 to ‘1’. W2CON0.1 decides whether it shall act as Master or
Slave. The baudrate is defined by W2CON0. 3:2.
Revision 1.1
Address
(Hex)
0xDA
0xE1
0xD9
Note: The 2-Wire needs a system clock frequency of at least 4 MHz to function correctly in Standard
Name/Mnemonic
mode. In Fast mode, the system clock frequency must be at least 8 MHz.
addressMatch
wire2Enable
dataReady
broadcast
W2CON1
W2SADR
maskIrq
W2DAT
ack_n
stop
Bit
5:0
6:0
7:0
0
5
4
3
2
1
0
Reset
value
0x00
0x00
0x00
0
0
Table 97. Wire registers
Type
159 of 191
R/W 1: 2-Wire is enabled. The clock to the 2-Wire core
R/W 2-Wire configuration register 1/status register.
R/W 1: Disable all interrupts.
R/W 2-Wire Slave address register.
R/W 2-Wire data register.
R
R
R
R
R
functionality is running. An 2-Wire transfer can be
initiated by the MCU via the 8051 SFR Bus (TX).
Note: This bit must be set in a separate write
operation before any other 2-Wire configuration
bits are written.
0: 2-Wire is disabled. The clock to the 2-Wire core
functionality stands still.
0: Enable all interrupts (not masked otherwise).
Note: Update this bit before any transmissions
begin.
Slave only:
1: The last received address was a broadcast
address (0x00).
0: The last received address was not a broadcast
address.
Cleared when reading W2CON1.
Slave only:
1: Interrupt caused by stop condition.
0: No interrupt caused by stop condition.
Cleared when reading W2CON1.
Slave only:
1: Interrupt caused by address match.
0: No interrupt caused by address match.
Cleared when reading W2CON1.
TX mode only:
1: Not-acknowledge (NACK).
0: Acknowledge (ACK).
This bit contains the acknowledge 2-Wire has
received after the last transfer.
Cleared when reading W2CON1.
1: Interrupt caused by byte transmitted/received.
0: No interrupt caused by byte transmitted/
received.
Cleared when reading W2CON1.
The address the 2-Wire reacts upon in slave
mode.
Accesses TX (write) and RX (read) buffers, both
one byte deep.
Description