nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 135

• Manufacturer Part Number: nrf24le1-f16q48-t
• Description: Ultra-low Power Wireless System On-chip Solution
• Manufacturer: ETC-unknow

c. Connection depends on configuration register CKLFCTL 2:0
CKLFCTL 2: 0 = 3'b000: Crystal connected between pin P0.0 and pin P0.1.
nRF24LE1 Preliminary Product Specification
17.3.4
Depending on the package size 1 to 4 ports are available on nRF24LE1. Desired pin direction and func-
tionality is configured using the configuration registers P0DIR , P1DIR , P2DIR , P3DIR , collectively referred
to as PxDIR, and P0CON , P1CON , P2CON and P3CON , referred to as PxCON. The PxDIR registers deter-
mine the direction of the pins and the PxCON registers contain the functional options for input and output
pin operation.
The PortCrossbar by default (at reset) configures all pins as inputs and connects them to the MCU GPIO
(pxDi).
To change pin direction, write the desired direction to the PxDIR registers.
Revision 1.1
7:0
7:0
Bit
Bit
Register name: P0DIR
Register name: P1DIR
dir
dir
Programmable registers
Name
name
RW
RW
Table 76.Pin out map for the 48 pin 7X7mm package
RW
RW
Direction bits for pins P0.0 – P0.7. Output: dir = 0, Input: dir = 1.
P0.7 only available on packages 32pin 5x5mm and 48pin
7x7mm
Direction bits for pins P1.0 – P1.7. Output: dir = 0, Input: dir = 1.
Port1 only available on packages 32pin 5x5mm and 48pin
7x7mm
P1.7 only available on package 48 pin 7x7
P0DIR 0
P0DIR 1
P0DIR 2
P0DIR 3
P0DIR 4
P0DIR 5
P0DIR 6
P0DIR 7
P1DIR 0
P1DIR 1
P1DIR 2
P1DIR 3
P1DIR 4
P1DIR 5
P1DIR 6
P1DIR 7
Table 77. P0DIR register
Table 78. P1DIR register
Address: 0x93
Address: 0x94
135 of 191
Function
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
Function
Reset value: 0xFF
Reset value: 0xFF