nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 63

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nrf24le1-f16q48-t

Manufacturer Part Number
nrf24le1-f16q48-t
Description
Ultra-low Power Wireless System On-chip Solution
Manufacturer
ETC-unknow
Datasheet
nRF24LE1 Preliminary Product Specification
5.1
The nRF24LE1 supports PDATA (Paged Data memory) addressing into data space. One page (256 bytes)
can be accessed by an indirect addressing scheme through registers R0 and R1 (@R0, @R1).
The MPAGE register controls the start address of the PDATA page:
MPAGE sets the upper half of the 16 bit address space. For example, setting MPAGE to 0x80 starts PDATA
from address 0x8000.
5.2
5.2.1
Accumulator is used by most of the MCU instructions to hold the operand and to store the result of an
operation. The mnemonics for accumulator specific instructions refer to accumulator as A, not ACC.
5.2.2
The B register is used during multiplying and division instructions. It can also be used as a scratch-pad reg-
ister to hold temporary data.
Revision 1.1
Addr
0xC9
Address
Address
0xE0
0xF0
PDATA memory addressing
MCU Special Function Registers
Accumulator - ACC
B Register – B
Bit
7:0
R/W
R/W
acc.7
bit7
bit7
b.7
acc.6
bit6
bit6
b.6
Start address of the PDATA page
acc.5
bit5
bit5
Table 19. MPAGE register
b.5
Table 20. ACC register
Table 21. B register
Function
63 of 191
acc.4
bit4
bit4
b.4
acc.3
bit3
bit3
b.3
acc.2
bit2
bit2
b.2
Reset value: 0x00
acc.1
bit1
bit1
b.1
acc.0
bit0
bit0
b.0

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