ADV7340EBZ AD [Analog Devices], ADV7340EBZ Datasheet - Page 4
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ADV7340EBZ
Manufacturer Part Number
ADV7340EBZ
Description
Manufacturer
AD [Analog Devices]
Datasheet
1.ADV7340EBZ.pdf
(88 pages)
ADV7340/ADV7341
DETAILED FEATURES
High definition (HD) programmable features
Enhanced definition(ED) programmable features
Standard definition (SD) programmable features
GENERAL DESCRIPTION
The ADV7340/ADV7341 are high speed, digital-to-analog
video encoders in a 64-lead LQFP package. Six high speed,
NSV, 3.3 V, 12-bit video DACs provide support for composite
(CVBS), S-Video (Y/C), and component (YPrPb/RGB) analog
outputs in either standard definition (SD), enhanced definition
(ED), or high definition (HD) video formats.
(720p/1080i/1035i)
4× oversampling (297 MHz)
Internal test pattern generator
Fully programmable YCrCb to RGB matrix
Gamma correction
Programmable adaptive filter control
Programmable sharpness filter control
CGMS (720p/1080i) and CGMS Type B (720p/1080i)
Undershoot limiter
Dual data rate (DDR) input support
EIA/CEA-861B compliance support
(525p/625p)
8× oversampling (216 MHz output)
Internal test pattern generator
Individual Y and PrPb output delay
Gamma correction
Programmable adaptive filter control
Fully programmable YCrCb to RGB matrix
Undershoot limiter
Macrovision Rev 1.2 (525p/625p)
CGMS (525p/625p) and CGMS Type B (525p)
Dual data rate (DDR) input support
EIA/CEA-861B compliance support
16× oversampling (216 MHz)
Internal test pattern generator
Controlled edge rates for start and end of active video
Individual Y and PrPb output delay
Undershoot limiter
Gamma correction
Digital noise reduction (DNR)
Multiple chroma and luma filters
Luma-SSAF™ filter with programmable gain/attenuation
PrPb SSAF™
Separate pedestal control on component and
VCR FF/RW sync mode
Macrovision Rev 7.1.L1
Copy generation management system (CGMS)
Wide screen signaling
Closed captioning
EIA/CEA-861B compliance support
Color and black bar, hatch, flat field/frame
Color and black bar
composite/S-Video output
Rev. 0 | Page 4 of 88
The ADV7340/ADV7341 each have a 30-bit pixel input port
that can be configured in a variety of ways. SD video formats
are supported over a SDR interface and ED/HD video formats
are supported over SDR and DDR interfaces. Pixel data can be
supplied in either the YCrCb or RGB color spaces.
The parts also support embedded EAV/SAV timing codes,
external video synchronization signals, and I
communication protocols.
In addition, simultaneous SD and ED/HD input and output are
supported. 216 MHz (SD and ED) and 297 MHz (HD)
oversampling ensures that external output filtering is not
required, while full-drive DACs ensure that external output
buffering is not required.
Cable detection and DAC auto power-down features keep
power consumption to a minimum.
Table 1 lists the video standards directly supported by the
ADV7340/ADV7341.
Table 1. Standards Directly Supported by the
ADV7340/ADV7341
Resolution
720 × 240
720 × 288
720 × 480
720 × 576
720 × 480
720 × 576
720 × 483
720 × 483
720 × 483
720 × 576
720 × 483
720 × 576
1920 × 1035
1920 × 1035
1280 × 720
1280 × 720
1920 × 1080
1920 × 1080
1920 × 1080
1920 × 1080
1920 × 1080
1
2
Other standards are supported in the ED/HD nonstandard timing mode.
I = interlaced, P = progressive.
I/P
P
P
I
I
I
I
P
P
P
P
P
P
I
I
P
P
I
I
P
P
P
2
Frame
Rate (Hz)
59.94
50
29.97
25
29.97
25
59.94
59.94
59.94
50
59.94
50
30
29.97
60, 50, 30,
25, 24
23.97,
59.94,
29.97
30, 25
29.97
30, 25, 24
23.98,
29.97
24
1
Clock Input
(MHz)
27
27
27
27
24.54
29.5
27
27
27
27
27
74.25
74.1758
74.1758
74.25
27
74.25
74.1758
74.25
74.1758
74.25
2
C and SPI
Standard
ITU-R
BT.601/656
ITU-R
BT.601/656
NTSC Square
Pixel
PAL Square
Pixel
SMPTE 293M
BTA T-1004
ITU-R BT.1358
ITU-R BT.1358
ITU-R BT.1362
ITU-R BT.1362
SMPTE 240M
SMPTE 240M
SMPTE 296M
SMPTE 296M
SMPTE 274M
SMPTE 274M
SMPTE 274M
SMPTE 274M
ITU-R BT.709-5