ADV7340EBZ AD [Analog Devices], ADV7340EBZ Datasheet - Page 69

• Manufacturer Part Number: ADV7340EBZ
• Manufacturer: AD [Analog Devices]

TYPICAL APPLICATION CIRCUIT
LOOP FILTER COMPONENTS
SHOULD BE LOCATED
CLOSE TO THE EXT_LF
PINS AND ON THE SAME
SIDE OF THE PCB AS THE
ADV7340/ADV7341.
PIXEL PORT INPUTS
EXTERNAL LOOP FILTERS
PV
V
INPUTS/OUTPUTS
INPUTS/OUTPUTS
(1.8V)
(1.8V)
DD_IO
PV
DD
V
V
CLOCK INPUTS
150nF
150nF
DD
AA
DD
MPU PORT
CONTROL
12nF
12nF
33µF
33µF
33µF
33µF
GND_IO
PGND
AGND
DGND
170Ω
170Ω
FERRITE BEAD
FERRITE BEAD
FERRITE BEAD
FERRITE BEAD
AGND
AGND
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
S_HSYNC
S_VSYNC
P_HSYNC
P_VSYNC
P_BLANK
CLKIN_A
CLKIN_B
SDA/SCLK
SCL/MOSI
SFL/MISO
ALSB/SPI_SS
EXT_LF2
EXT_LF2
S0
S1
S2
S3
S4
S5
S6
S7
S8
S9
10µF
10µF
10µF
10µF
AGND
DGND
GND_IO
PGND
ADV7340/ADV7341
PGND
PGND
DGND
DGND
DGND
DGND
0.1µF
0.1µF
0.1µF
0.1µF
GND_IO
PGND
AGND
DGND
Figure 90. ADV7340/ADV7341 Typical Application Circuit
GND_IO
GND_IO
COMP1
COMP2
DAC 1
DAC 2
DAC 3
DAC 4
DAC 5
DAC 6
R
R
V
SET1
SET2
REF
0.01µF
0.01µF
0.01µF
0.01µF
GND_IO
AGND
DGND
PGND
4.12kΩ
AGND
OPTIONAL LPF
OPTIONAL LPF
OPTIONAL LPF
300Ω
300Ω
300Ω
V
AGND
AGND
AGND
75Ω
AGND
AA
1µF
AGND
2.2nF
Rev. 0 | Page 69 of 88
V
DECOUPLING FOR
EACH POWER PIN
DD
OPTIONAL LPF
V
SUPPLY
DECOUPLING
POWER SUPPLY
75Ω
DD_IO
V
AGND
510Ω
AGND
510Ω
AGND
510Ω
AGND
AA
PV
SUPPLY
DECOUPLING
V
SUPPLY
DECOUPLING
AA
+
+
+
–
–
–
2.2nF
510Ω
DD
AGND
510Ω
510Ω
510Ω
+V
–V
+V
–V
+V
–V
POWER
OPTIONAL LPF
POWER
POWER
AD8061
AD8061
AD8061
75Ω
AGND
0.1µF
OPTIONAL LPF
75Ω
75Ω
75Ω
V
AA
AGND
NOTES
1. FOR OPTIMUM PERFORMANCE, EXTERNAL COMPONENTS CONNECTED
2. WHEN OPERATING IN I
3. THE RESISTORS CONNECTED TO THE R
1.1kΩ
1.235V
AD1580
DAC 3
DAC 1
DAC 2
TO THE COMP, R
CLOSE TO AND ON THE SAME SIDE OF THE PCB AS THE ADV7340/ADV7341.
CONFIGURABLE USING THE ALSB/SPI_SS PIN:
TOLERANCE.
DAC 4
DAC 5
DAC 6
ALSB/SPI_SS = 0, I
ALSB/SPI_SS = 1, I
DACs 1-3 FULL DRIVE OPTION
DAC 1
DAC 2
DAC 3
R
OPTIONAL. IF THE INTERNAL VOLTAGE
REFERENCE IS USED, A 0.1µF CAPACITOR
SHOULD BE CONNECTED FROM V
DACs 1-3 LOW DRIVE OPTION
SET1
SET
2
2
C DEVICE ADDRESS = 0xD4 OR 0x54
C DEVICE ADDRESS = 0xD6 OR 0x56
, V
REF
2
OPTIONAL LPF
OPTIONAL LPF
OPTIONAL LPF
4.12kΩ
C MODE, THE I
AGND
300Ω
300Ω
300Ω
AGND
AGND
AGND
AND DAC OUTPUT PINS SHOULD BE LOCATED
510Ω
AGND
510Ω
AGND
510Ω
AGND
ADV7340/ADV7341
+
+
+
2
–
–
–
C DEVICE ADDRESS IS
510Ω
510Ω
510Ω
+V
–V
+V
–V
+V
–V
SET
AD8061
AD8061
AD8061
PINS SHOULD HAVE A 1%
REF
TO V
75Ω
75Ω
75Ω
AA
.
DAC 1
DAC 2
DAC 3