ADV7340EBZ AD [Analog Devices], ADV7340EBZ Datasheet - Page 79

• Manufacturer Part Number: ADV7340EBZ
• Manufacturer: AD [Analog Devices]

Mode 2—Master Option (Subaddress 0x8A = X X X X X 1 0 1)
In this mode, the ADV7340/ADV7341 can generate horizontal and vertical sync signals. A coincident low transition of both HSYNC and
VSYNC inputs indicates the start of an odd field.
A VSYNC low transition when HSYNC is high indicates the start of an even field. The ADV7340/ADV7341 automatically blank all
normally blank lines as per CCIR-624. HSYNC and VSYNC are output on the S_HSYNC and S_VSYNC pins, respectively.
HSYNC
HSYNC
VSYNC
VSYNC
HSYNC
HSYNC
VSYNC
VSYNC
522
DISPLAY
DISPLAY
260
HSYNC
VSYNC
PIXEL
DATA
523
622
309
261
DISPLAY
DISPLAY
524
623
262
310
525
263
624
311
EVEN FIELD
Figure 109. SD Timing Mode 2, Even-to-Odd Field Transition (Master/Slave)
ODD FIELD
1
264
625
312
ODD FIELD
EVEN FIELD
2
265
313
1
3
266
314
2
Figure 107. SD Slave Mode 2, NTSC
Figure 108. SD Slave Mode 2, PAL
4
267
315
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3
ODD FIELD
5
VERTICAL BLANK
268
VERTICAL BLANK
VERTICAL BLANK
EVEN FIELD
316
VERTICAL BLANK
NTSC = 122 × CLOCK/2
4
PAL = 132 × CLOCK/2
6
269
EVEN FIELD
317
ODD FIELD
5
7
270
318
6
8
271
319
7
9
272
320
10
273
21
11
274
Cb
334
22
Y
ADV7340/ADV7341
DISPLAY
23
335
20
283
Cr
DISPLAY
336
21
Y
284
DISPLAY
DISPLAY
22
285