ATAM510X-ILQY ATMEL [ATMEL Corporation], ATAM510X-ILQY Datasheet - Page 25

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ATAM510X-ILQY

Manufacturer Part Number
ATAM510X-ILQY
Description
MARC4 4-bit MTP Universal Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
3.2.1
3.2.2
3.2.3
4711B–4BMCU–01/05
Port Data Register (PxDAT)
Port Data Direction Register (PxDDR)
Bi-directional Port 0 and Port 1
Bit 3 = MSB, Bit 0 = LSB, x = Port address
Table 3-3.
In this port type, the data direction register is not independently software programmable
because the direction of the complete port is switched automatically when an I/O instruction
occurs (see
instruction and to input with an IN instruction. The data written to a port will be stored in the out-
put data latches and appears immediately at the port pin following the OUT instruction. After
RESET, all output latches are set to 1 and the ports are switched to input mode. An IN instruc-
tion reads the condition of the associated pins.
Note:
PxDDR
PxDAT
Code: 3 2 1 0
x x x 1
x x x 0
x x 1 x
x x 0 x
x 1 x x
x 0 x x
1 x x x
0 x x x
Care must be taken when switching these bi-directional ports from output to input. The capacitive
pin loading at this port, in conjunction with the high resistance pull-ups, may cause the CPU to
read the contents of the output data register rather than the external input state. This can be
avoided by using either of the following programming techniques:
Use two IN instructions and DROP the first data nibble. The first IN switches the port from output
to input and the DROP removes the first invalid nibble. The second IN reads the valid pin state.
Use an OUT instruction followed by an IN instruction. With the OUT instruction, the capacitive load
is charged or discharged depending on the optional pull-up /pull-down configuration. Write a 1 for
pins with pull-up resistors, and a 0 for pins with pull-down resistors.
Bit 3
PxDDR3
Bit 3
PxDAT3
Figure 3-2 on page
Port Data Direction Register (PxDDR)
Function
BPx0 in input mode
BPx0 in output mode
BPx1 in input mode
BPx1 in output mode
BPx2 in input mode
BPx2 in output mode
BPx3 in input mode
BPx3 in output mode
Bit 2
PxDDR2
Bit 2
PxDAT2
26). The port can be switched to output mode with an OUT
Bit 1
PxDDR1
Bit 1
PxDAT1
Auxiliary register address: ’Port address’ hex
Bit 0
PxDDR0
Primary register address: ’Port address’ hex
Bit 0
PxDAT0
Reset value: 1111b
Reset value: 1111b
ATAM510
25

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