ATAM510X-ILQY ATMEL [ATMEL Corporation], ATAM510X-ILQY Datasheet - Page 41

• Manufacturer Part Number: ATAM510X-ILQY
• Description: MARC4 4-bit MTP Universal Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

3.5.3
3.5.3.1
4711B–4BMCU–01/05
Timer 0 Modes
Timer 0 Mode Register (T0MO)
In 16-bit mode, Timer 0 and Timer 1 are cascaded thus forming a 16-bit counter (see
13) whereby, irrespective of the state of Timer 0 interrupt mask bit (T0IM), the Timer 1 counts
both Timer 0 overflow and compares interrupt events. These are generated according to the
state of the Timer 0 Mode Register as described in the T0MO table. The comparators are also
cascaded so that when both Timer 0 and Timer 1 match their respective compare registers,
Timer 1 generates both an output signal and a compare interrupt (if unmasked).
In measurement modes, only Timer 0 capture register is loaded with Timer 0's contents on an
end-of-measurement event. Timer 1 capture register operates solely as a shadow register.
There is no 16-bit capture operation, so the user program must check if Timer 1 has incre-
mented between reading the lower and higher byte. Likewise, there is no automatic suppression
of spurious interrupts which could conceivably be generated between writing to Timer 0 and
Timer 1 compare registers.
The Timer 0 mode configuration is defined in the Timer 0 Mode Register (T0MO). The available
modes and the effect on the Timer 0 interrupt and interrupt flags is shown below. In all modes
except the position measurement mode, Timer 0 acts as an up-counter, the related clock fre-
quency being defined by the selected clock source and the prescaler division factor. The counter
can be reset and halted at any time by the T0RST bit of the TCMO register which also resets all
the interrupt status flags and capture registers. Whenever Port 4 BP40 and BP41 pins are
required for Timer 0 I/O, then the appropriate TCIOR enable bit must be set low. In this case, the
port direction switching is handled automatically by the hardware. In modes where the BP40 is
not used as a timer clock input or as a melody envelope output, the BP40 outputs the same sig-
nal as that appearing on BP41. With the help of the T0NINV bit of the Timer/Counter Mode
Register (TCMO), the BP41 output can be inverted so that BP40 and BP41 form a differential
output stage which can be used for directly driving piezo buzzers or small stepper motors.
T0MO3 ... 0 - Timer 0 Mode Code
T0MO
T0MO3
Bit 3
Subport address (indirect write access): '0'hex of Port address '9'hex
T0MO2
Bit 2
T0MO1
Bit 1
T0MO0
Bit 0
Reset value: 1111b
ATAM510
Figure 3-
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