ATAM510X-ILQY ATMEL [ATMEL Corporation], ATAM510X-ILQY Datasheet - Page 52

• Manufacturer Part Number: ATAM510X-ILQY
• Description: MARC4 4-bit MTP Universal Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

3.5.4.3
3.5.4.4
52
ATAM510
Timer 1 Compare Register (T1CP) - Byte Write
Timer 1 Capture Register (T1CA) - Byte Read
T1CP3 ... T1CP0 - Timer 1 Compare Register Data (low nibble) - first write cycle
T1CP7 ... T1CP4 - Timer 1 Compare Register Data (high nibble) - second write cycle
The compare register T1CP is 8 bits wide and must be accessed as a byte wide subport (see
section “Addressing Peripherals”). The data is written low nibble first, followed by the high nib-
ble. Any timer interrupts are automatically suppressed until the complete compare value has
been transferred.
T1CA7. .. T1CA4 - Timer 1 Capture Register Data (high nibble) - first read cycle
T1CA3 ... T1CA0 - Timer 1 Capture Register Data (low nibble) - second read cycle
The 8-bit capture register T1CA is read as byte wide subport. Note, however, unlike the writing
to the compare register, the high nibble is read first followed by low nibble. The 8-bit timer state
is captured on reading the first nibble and held until the complete byte has been read. During
this transfer, the timer is free to continue counting. The previous capture value will be held until
the timer is restarted again.
T1CP
T1CA
First write
cycle
Second write
cycle
First write
cycle
Second write
cycle
Subport address (indirect read access): '8'hex of Port address '9'hex
Bit 3
T1CP3
Bit 7
T1CP7
Subport address (indirect read access): '8'hex of Port address '9'hex
Bit 7
T1CA7
Bit 3
T1CA3
Bit 2
T1CP2
Bit 6
T1CP6
Bit 6
T1CA6
Bit 2
T1CA2
Bit 1
T1CP1
Bit 5
T1CP5
Bit 5
T1CA5
Bit 1
T1CA1
Bit 0
T1CP0
Bit 4
T1CP4
Bit 4
T1CA4
Bit 0
T1CA0
Reset value: xxxxb
Reset value: xxxxb
Reset value: xxxxb
Reset value: xxxxb
4711B–4BMCU–01/05