ATAM510X-ILQY ATMEL [ATMEL Corporation], ATAM510X-ILQY Datasheet - Page 53

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ATAM510X-ILQY

Manufacturer Part Number
ATAM510X-ILQY
Description
MARC4 4-bit MTP Universal Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
3.5.4.5
Figure 3-24. Timer 1 Counter Free Running (50% Duty Cycle)
3.5.4.6
Figure 3-25. Timer 1 Counter Auto Reload
4711B–4BMCU–01/05
Timer
State
Compare
Interrupt
T1OUT
(TIM1)
Timer
Clock
(clock set to neg. edge)
(clock set to rising edge)
Timer
State
Compare
Interrupt
T1OUT
(TIM1)
Timer
Clock
Timer 1 Counter Free Running (50% Duty Cycle)
Timer 1 Counter Auto Reload (Strobe and 50% Duty Cycle)
50% duty
cycle
strobe
50% duty
cycle
In the free running counter mode, the counter counts up with either an internal or external clock
and cycles through all 256 timer states. On the clock following a match between the compare
register (T1CR) and the counter, a compare interrupt (if unmasked) is generated and the TIM1
pin is toggled (see
In the auto-reload mode, the counter counts up with either an internal or external clock. On the
clock cycle following a match between the compare register (T1CR) and the counter, a compare
interrupt (if unmasked) is generated. The TIM1 output is either strobed or toggled and the
counter reset (see
the compare register. In 50% duty cycle mode the frequency of TIM1 is:
f
TIM1
= f
in
/2(n+1)
255
0
1
0
2
1 2 3
3
where the compare value (n) =1 ... 255
Figure
Figure 3-23 on page
4
5 6
4
5 6
7
3-25). Therefore, the counter cycle period is defined by the contents of
Timer = compare register (= 4)
0
1
2
Timer = compare register (= 7)
Resets timer
3
4
5 6
255
50).
7 0
0
1
1
2
2
3
3
4
4
5 6
5 6
7 0
255
0
1 2 3
ATAM510
4
5 6
53

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