ATAM510X-ILQY ATMEL [ATMEL Corporation], ATAM510X-ILQY Datasheet - Page 5

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ATAM510X-ILQY

Manufacturer Part Number
ATAM510X-ILQY
Description
MARC4 4-bit MTP Universal Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
2. MARC4 Architecture
2.1
4711B–4BMCU–01/05
General Description
The functionality, programming and pinning of the ATAM510 is compatible with the ATAR510
mask programmable microcontroller from Atmel. All on-chip modules are addressed and con-
trolled with exactly the same programming code, so that a program targeted for the ATAR510
can be read directly into the ATAM510 and will operate in the same fashion.
The MARC4 microcontroller consists of an advanced stack-based 4-bit CPU core and on-chip
peripherals. The CPU is based on the Harvard architecture with physically separate program
memory (ROM) and data memory (RAM). Three independent buses, the instruction bus, the
memory bus and the I/O bus, are used for parallel communication between ROM, RAM and
peripherals. This enhances program execution speed by allowing both instruction prefetching,
and a simultaneous communication to the on-chip peripheral circuitry. The extremely powerful
integrated interrupt controller with associated eight prioritized interrupt levels supports fast and
efficient processing of hardware events. The MARC4 is designed for the high-level programming
language qFORTH. The core includes both an expression and a return stack. This architecture
enables high-level language programming without any loss of efficiency or code density.
Figure 2-1.
System
Reset
clock
Sleep
Clock
MARC4 Core
Reset
Program
memory
Instruction
controller
Interrupt
decoder
Instruction
On-chip peripheral modules
bus
I/O bus
MARC4 CORE
PC
Memory bus
CCR
SP
RP
X
Y
TOS
ALU
256 x 4-bit
RAM
ATAM510
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