ATAM510X-ILQY ATMEL [ATMEL Corporation], ATAM510X-ILQY Datasheet - Page 48

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ATAM510X-ILQY

Manufacturer Part Number
ATAM510X-ILQY
Description
MARC4 4-bit MTP Universal Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Figure 3-19. An Example 4-bit PWM/PDM Comparison
3.5.3.11
Figure 3-20. Period Measurement
3.5.3.12
48
PDM = 0.25
PDM = 0.75
PWM = 0.25
PWM = 0.75
ATAM510
EOM
Interrupt
T0IN1
(BP41)
Period Measurement Modes (Rising and Falling Edge)
Pulse Width Measurement Modes (High and Low)
During the period measurement mode, the counter counts the number of either internal or exter-
nal clocks in one period of the BP41 input signal (see
chosen, this will be from rising edge to the next rising edge or conversely, falling edge to the fol-
lowing falling edge. On the trigger edge, the counter state is loaded into the capture register and
subsequently reset. The measured value remains in the capture register until overwritten by the
following measured value. Interrupts can be generated by either an overflow condition or an
end-of-measurement (EOM) event. An EOM event signals to the CPU that a new measured
value is present in the capture register and can be read, if required.
In this mode, the selected clock source is gated to the counter for the duration of each input
pulse received on BP41 (see
during the high or low phase depends on the selected mode. At the end of each pulse, the
counter state is loaded into the capture register and subsequently reset. Interrupts can be gener-
ated by either an overflow condition or an end-of-measurement (EOM) event. An EOM event
signals the CPU that a new measured value is present in the capture register and can be read if
required.
Captures and resets timer
Falling edge triggered
t_period
Repetition period
Figure 3-21 on page
49). Whether the measurement takes place
Rising edge triggered
Figure
t_period
3-20). Depending on the mode
4711B–4BMCU–01/05

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