PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 114
PIC18C242
Manufacturer Part Number
PIC18C242
Description
High-Performance Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18C242.pdf
(296 pages)
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PIC18CXX2
13.5
In Pulse Width Modulation (PWM) mode, the CCP1 pin
produces up to a 10-bit resolution PWM output. Since
the CCP1 pin is multiplexed with the PORTC data latch,
the TRISC<2> bit must be cleared to make the CCP1
pin an output.
Figure 13-3 shows a simplified block diagram of the
CCP module in PWM mode.
For a step by step procedure on how to set up the CCP
module for PWM operation, see Section 13.5.3.
FIGURE 13-3: SIMPLIFIED PWM BLOCK
DS39026B-page 114
Note:
Note: 8-bit timer is concatenated with 2-bit internal Q clock
CCPR1L
CCPR1H (Slave)
Comparator
Duty cycle registers
PR2
TMR2
Comparator
PWM Mode
or 2 bits of the prescaler to create 10-bit time-base.
Clearing the CCP1CON register will force
the CCP1 PWM output latch to the default
low level. This is not the PORTC I/O data
latch.
(Note 1)
DIAGRAM
Clear Timer,
CCP1 pin and
latch D.C.
CCP1CON<5:4>
R
S
Q
TRISC<2>
RC2/CCP1
Preliminary
A PWM output (Figure 13-4) has a time base (period)
and a time that the output stays high (duty cycle).
The frequency of the PWM is the inverse of the
period (1/period).
FIGURE 13-4: PWM OUTPUT
TMR2 = PR2
Duty Cycle
Period
TMR2 = Duty Cycle
7/99 Microchip Technology Inc.
TMR2 = PR2
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