PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 68

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PIC18C242

Manufacturer Part Number
PIC18C242
Description
High-Performance Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC18CXX2
Register 7-2:
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
DS39026B-page 68
bit 7
RBPU: PORTB Pull-up Enable bit
1 = All PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG0:External Interrupt0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG1: External Interrupt1 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG2: External Interrupt2 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
Unimplemented: Read as '0'
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as '0'
RBIP: RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
Legend:
R = Readable bit
- n = Value at POR reset
Note:
R/W-1
RBPU
INTCON2 Register
Interrupt flag bits get set when an interrupt condition occurs, regardless of the state
of its corresponding enable bit or the global enable bit. User software should ensure
the appropriate interrupt flag bits are clear prior to enabling an interrupt. This feature
allows for software polling.
INTEDG0
R/W-1
INTEDG1
R/W-1
W = Writable bit
’1’ = Bit is set
INTEDG2
R/W-1
Preliminary
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
TMR0IP
R/W-1
x = Bit is unknown
U-0
7/99 Microchip Technology Inc.
bit 0
R/W-1
RBIP

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