PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 85

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

8.4
This section is applicable to only the PIC18C4X2
devices.
PORTD is an 8 bit wide bi-directional port. The corre-
sponding Data Direction Register is TRISD. Setting a
TRISD bit (=1) will make the corresponding PORTD pin
an input, (i.e., put the corresponding output driver in a
hi-impedance mode). Clearing a TRISD bit (=0) will
make the corresponding PORTD pin an output, (i.e.,
put the contents of the output latch on the selected pin).
The Data Latch Register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register reads and writes the latched output value for
PORTD.
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configurable as an input or
output.
PORTD can be configured as an 8-bit wide micropro-
cessor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL. See Section 8.6 for additional information on
the Parallel Slave Port (PSP).
EXAMPLE 8-4:
7/99 Microchip Technology Inc.
CLRF
CLRF
MOVLW 0xCF
MOVWF TRISD
PORTD, TRISD and LATD Registers
PORTD
LATD
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
INITIALIZING PORTD
Preliminary
FIGURE 8-8:
WR TRISD
WR LATD
or
PORTD
Note 1: I/O pins have protection diodes to V
Data
Bus
RD PORTD
TRIS Latch
Data Latch
RD LATD
D
D
CK
CK
PORTD BLOCK DIAGRAM
IN I/O PORT MODE
RD TRISD
Q
Q
PIC18CXX2
Q
EN
EN
Schmitt
Trigger
input
buffer
D
DS39026B-page 85
DD
and V
I/O pin
SS
(1)
.