PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 58

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18CXX2
5.2.3
The long write must be terminated by a reset or any
interrupt.
The interrupt source must have its interrupt enable bit
set. When the source sets its interrupt flag, program-
ming will terminate. This will occur regardless of the
settings of interrupt priority bits, the GIE/GIEH bit or the
PIE/GIEL bit.
TABLE 5-2:
DS39026B-page 58
(default)
(default)
(default)
GIEH
GIE/
X
X
0
0
1
0
1
INTERRUPTS
(default)
(default)
(default)
GIEL
PIE/
X
X
0
1
0
1
0
SLEEP MODE, INTERRUPT ENABLE BITS AND INTERRUPT RESULTS
high priority
high priority
(default)
(default)
Priority
low
low
X
X
X
1
0
0
1
Interrupt
(default)
Enable
0
1
1
1
1
1
1
Interrupt
Preliminary
Flag
X
0
1
1
1
1
1
Long write continues even if interrupt
flag becomes set during sleep.
Long write continues, will wake when
the interrupt flag is set.
Terminates long write,
executes next instruction. Interrupt flag
not cleared.
Terminates long write,
executes next instruction. Interrupt flag
not cleared.
Terminates long write, executes next
instruction. Interrupt flag not cleared.
Terminates long write, branches to low
priority interrupt vector.
Interrupt flag can be cleared by ISR.
Terminates long write, branches to high
priority interrupt vector.
Interrupt flag can be cleared by ISR.
Depending on the states of interrupt priority bits, the
GIE/GIEH bit or the PIE/GIEL bit, program execution
can either be vectored to the high or low priority Inter-
rupt Service Routine (ISR) or continue execution from
where programming commenced.
In either case, the interrupt flag will not be cleared
when programming is terminated and will need to be
cleared by the software.
Action
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