PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 124

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18CXX2
14.2.1.4
The master can initiate the data transfer at any time
because it controls the SCK. The master determines
when the slave (Processor 2, Figure 14-2) is to broad-
cast data by the software protocol.
In master mode the data is transmitted/received as
soon as the SSPBUF register is written to. If the SPI is
only going to receive, the SDO output could be disabled
(programmed as an input). The SSPSR register will
continue to shift in the signal present on the SDI pin at
the programmed clock rate. As each byte is received, it
will be loaded into the SSPBUF register as if a normal
received byte (interrupts and status bits appropriately
set). This could be useful in receiver applications as a
“line activity monitor” mode.
The clock polarity is selected by appropriately program-
ming the CKP bit (SSPCON1<4>). This then would give
waveforms for SPI communication as shown in
FIGURE 14-3: SPI MODE WAVEFORM (MASTER MODE)
DS39026B-page 124
Write to
SSPBUF
SCK
(CKP = 0
CKE = 0)
SCK
(CKP = 1
CKE = 0)
SCK
(CKP = 0
CKE = 1)
SCK
(CKP = 1
CKE = 1)
SDO
(CKE = 0)
SDO
(CKE = 1)
SDI
(SMP = 0)
Input
Sample
(SMP = 0)
SDI
(SMP = 1)
Input
Sample
(SMP = 1)
SSPIF
SSPSR to
SSPBUF
MASTER MODE
bit7
bit7
bit7
bit7
bit6
bit6
bit5
bit5
Preliminary
bit4
bit4
Figure 14-3, Figure 14-5, and Figure 14-6 where the
MSB is transmitted first. In master mode, the SPI clock
rate (bit rate) is user programmable to be one of the fol-
lowing:
• F
• F
• F
• Timer2 output/2
This allows a maximum data rate (at 40 MHz) of 10.00
Mbps.
Figure 14-3 Shows the waveforms for master mode.
When the CKE bit is set, the SDO data is valid before
there is a clock edge on SCK. The change of the input
sample is shown based on the state of the SMP bit. The
time when the SSPBUF is loaded with the received
data is shown.
bit3
bit3
OSC
OSC
OSC
/4 (or T
/16 (or 4 • T
/64 (or 16 • T
bit2
bit2
CY
)
CY
bit1
bit1
CY
)
)
7/99 Microchip Technology Inc.
bit0
bit0
bit0
bit0
Next Q4 cycle
after Q2
4 clock
modes