AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 105

• Manufacturer Part Number: AT83C51SND1C_03
• Description: Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
• Manufacturer: ATMEL [ATMEL Corporation]

4109E–8051–06/03
Table 97. UEPRST Register
UEPRST (S:D5h) – USB Endpoint FIFO Reset Register
Reset Value = 0000 0000b
Table 98. UEPINT Register
UEPINT (S:F8h Read-only) – USB Endpoint Interrupt Register
Reset Value = 0000 0000b
Number
Number
7 - 3
7 - 3
Bit
Bit
7
2
1
0
7
2
1
0
-
-
Mnemonic Description
Mnemonic Description
EP2RST
EP1RST
EP0RST
EP2INT
EP1INT
EP0INT
Bit
Bit
6
6
-
-
-
-
Reserved
The value read from these bits is always 0. Do not set these bits.
Endpoint 2 FIFO Reset
Set and clear to reset the endpoint 2 FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
Endpoint 1 FIFO Reset
Set and clear to reset the endpoint 1 FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
Endpoint 0 FIFO Reset
Set and clear to reset the endpoint 0 FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received.
Reserved
The value read from these bits is always 0. Do not set these bits.
Endpoint 2 Interrupt Flag
Set by hardware when an interrupt is triggered in UEPSTAX and the endpoint 2
interrupt is enabled in UEPIEN.
Must be cleared by software.
Endpoint 1 Interrupt Flag
Set by hardware when an interrupt is triggered in UEPSTAX and the endpoint 1
interrupt is enabled in UEPIEN.
Must be cleared by software.
Endpoint 0 Interrupt Flag
Set by hardware when an interrupt is triggered in UEPSTAX and the endpoint 0
interrupt is enabled in UEPIEN.
Must be cleared by software.
5
5
-
-
4
4
-
-
3
3
-
-
AT8xC51SND1C
EP2RST
EP2INT
2
2
EP1RST
EP1INT
1
1
EP0RST
EP0INT
0
0
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