AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 27

• Manufacturer Part Number: AT83C51SND1C_03
• Description: Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
• Manufacturer: ATMEL [ATMEL Corporation]

Dual Data Pointer
Description
Application
4109E–8051–06/03
The AT8xC51SND1C implement a second data pointer for speeding up code execution
and reducing code size in case of intensive usage of external memory accesses.
DPTR0 and DPTR1 are seen by the CPU as DPTR and are accessed using the SFR
addresses 83h and 84h that are the DPH and DPL addresses. The DPS bit in AUXR1
register (see Table 21) is used to select whether DPTR is the data pointer 0 or the data
pointer 1 (see Figure 20).
Figure 20. Dual Data Pointer Implementation
Software can take advantage of the additional data pointers to both increase speed and
reduce code size, for example, block operations (copy, compare, search …) are well
served by using one data pointer as a “source” pointer and the other one as a “destina-
tion” pointer.
Below is an example of block move implementation using the 2 pointers and coded in
assembler. The latest C compiler also takes advantage of this feature by providing
enhanced algorithm libraries.
The INC instruction is a short (2 Bytes) and fast (6 CPU clocks) way to manipulate the
DPS bit in the AUXR1 register. However, note that the INC instruction does not directly
force the DPS bit to a particular state, but simply toggles it. In simple routines, such as
the block move example, only the fact that DPS is toggled in the proper sequence mat-
ters, not its actual value. In other words, the block move routine works the same whether
DPS is '0' or '1' on entry.
; ASCII block move using dual data pointers
; Modifies DPTR0, DPTR1, A and PSW
; Ends when encountering NULL character
; Note: DPS exits opposite of entry state unless an extra INC AUXR1 is added
AUXR1
move:
mv_loop: inc
end_move:
DPTR1
EQU
mov
inc
mov
movx A,@DPTR
inc
inc
movx @DPTR,A
inc
jnz
DPTR0
0A2h
DPTR,#SOURCE ; address of SOURCE
AUXR1
DPTR,#DEST
AUXR1
DPTR
AUXR1
DPTR
mv_loop
DPH0
DPH1
DPL0
DPL1
; switch data pointers
; address of DEST
; switch data pointers
; get a Byte from SOURCE
; increment SOURCE address
; switch data pointers
; write the Byte to DEST
; increment DEST address
; check for NULL terminator
DPS
0
1
0
1
AUXR1.0
DPH
DPL
AT8xC51SND1C
DPTR
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