AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 152

• Manufacturer Part Number: AT83C51SND1C_03
• Description: Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
• Manufacturer: ATMEL [ATMEL Corporation]

Configuration
Master Configuration
Slave Configuration
Data Exchange
Master Mode with Polling
Policy
152
AT8xC51SND1C
The SPI configuration is made through SPCON.
The SPI operates in master mode when the MSTR bit in SPCON is set.
The SPI operates in slave mode when the MSTR bit in SPCON is cleared and data has
been loaded is SPDAT.
There are 2 possible methods to exchange data in master and slave modes:
•
•
Figure 119 shows the initialization phase and the transfer phase flows using the polling
method. Using this flow prevents any overrun error occurrence.
The bit rate is selected according to Table 131. The transfer format depends on the
slave peripheral.
SS may be deasserted between transfers depending also on the slave peripheral.
SPIF flag is cleared when reading SPDAT (SPSTA has been read before by the “end of
transfer” check).
This polling method provides the fastest effective transmission and is well adapted when
communicating at high speed with other microcontrollers. However, the procedure may
then be interrupted at any time by higher priority tasks.
Figure 119. Master SPI Polling Flows
polling
interrupts
program CPOL & CPHA
Select Master Mode
SPI Initialization
Disable interrupt
Polling Policy
program SPR2:0
Select Bit Rate
Select Format
Enable SPI
MSTR = 1
SPEN = 1
SPIE = 0
write data in SPDAT
Get Data Received
End Of Transfer?
Polling Policy
Last Transfer?
Deselect Slave
SPI Transfer
Start Transfer
Select Slave
read SPDAT
SPIF = 1?
Pn.x = H
Pn.x = L
4109E–8051–06/03