AT83C51SND1C_03 ATMEL [ATMEL Corporation], AT83C51SND1C_03 Datasheet - Page 176

• Manufacturer Part Number: AT83C51SND1C_03
• Description: Single-Chip Flash Microcontroller with MP3 Decoder and Human Interface
• Manufacturer: ATMEL [ATMEL Corporation]

Conversion Launching
End Of Conversion
176
AT8xC51SND1C
Figure 132. ADC Configuration Flow
The conversion is launched by setting the ADSST bit in ADCON register, this bit
remains set during the conversion. As soon as the conversion is started, it takes 11
clock periods (T
Figure 133. ADC Conversion Launching Flow
The end of conversion is signalled by the ADEOC flag in ADCON register becoming set
or by the ADSST bit in ADCON register becoming cleared. ADEOC flag can generate an
interrupt if enabled by setting EADC bit in IEN1 register. This flag is set by hardware and
must be reset by software.
CONV
) before the data is available in ADDH and ADDL registers.
Program ADC Clock
Conversion Start
ADCD4:0 = xxxxxb
Start Conversion
Wait Setup Time
Configuration
Select Channel
Enable ADC
ADCS = 0-1
ADSST = 1
ADIDL = x
ADEN = 1
ADC
ADC
4109E–8051–06/03