MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 222

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
Motorola reserves the right to make changes without further notice to any products herein
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Input/Output (I/O) Ports
Technical Data
222
NOTES:
PTAPUE
1. X = Don’t care.
2. Pin pulled to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance.
Bit
X
1
0
When DDRAx is a logic 1, reading address $0000 reads the PTAx data
latch. When DDRAx is a logic 0, reading address $0000 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Table 13-2
DDRA
Freescale Semiconductor, Inc.
Bit
0
0
1
DD
For More Information On This Product,
by internal pull-up.
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
PTA Bit
summarizes the operation of the port A pins.
Go to: www.freescale.com
X
Table 13-2. Port A Pin Functions
X
X
(1)
Input/Output (I/O) Ports
Figure 13-4. Port A I/O Circuit
Input, V
Input, Hi-Z
RESET
I/O Pin
Output
Mode
DD
(2)
(4)
Accesses to DDRA
DDRAx
PTAx
Read/Write
DDRA[7:0]
DDRA[7:0]
DDRA[7:0]
MC68HC908JL8
PTA[7:0]
Read
PTAPUEx
Accesses to PTA
Pin
Pin
MOTOROLA
PTA[7:0]
PTA[7:0]
To KBI
PTA[7:0]
Write
Rev. 2.0
PTAx
(3)
(3)

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