MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 229

• Manufacturer Part Number: MC68HC908JL8
• Description: Motorola reserves the right to make changes without further notice to any products herein
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC908JL8
MOTOROLA
NOTE:
—
Rev. 2.0
DDRD[7:0] — Data Direction Register D Bits
Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
the port D I/O logic.
When DDRDx is a logic 1, reading address $0003 reads the PTDx data
latch. When DDRDx is a logic 0, reading address $0003 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
of the port D pins.
NOTES:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect the input.
DDRD
These read/write bits control port D data direction. Reset clears
DDRD[7:0], configuring all port D pins as inputs.
Freescale Semiconductor, Inc.
Bit
0
1
For More Information On This Product,
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
PTD Bit
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X
X
(1)
Input/Output (I/O) Ports
Table 13-4. Port D Pin Functions
Figure 13-12. Port D I/O Circuit
Input, Hi-Z
RESET
I/O Pin
Output
Mode
(2)
Accesses to DDRD
DDRDx
Table 13-4
PTDx
Read/Write
DDRD[7:0]
DDRD[7:0]
summarizes the operation
Figure 13-12
PTD[7:0]
Input/Output (I/O) Ports
PTDPU[6:7]
Read
Accesses to PTD
Pin
To ADC, TIM1, SCI
Technical Data
PTD[7:0]
PTD[7:0]
Write
shows
Port D
PTDx
229
(3)