MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 251

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MC68HC908JL8

Manufacturer Part Number
MC68HC908JL8
Description
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Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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16.4 I/O Signals
16.4.1 ICLK
16.4.2 COPCTL Write
16.4.3 Power-On Reset
16.4.4 Internal Reset
MC68HC908JL8
MOTOROLA
NOTE:
Rev. 2.0
A COP reset pulls the RST pin low for 32 × ICLK cycles and sets the
COP bit in the reset status register (RSR). (See
Register
Place COP clearing instructions in the main program and not in an
interrupt subroutine. Such an interrupt subroutine could keep the COP
from generating a reset even while the main program is not working
properly.
The following paragraphs describe the signals shown in
ICLK is the internal oscillator output signal, typically 50-kHz. The ICLK
frequency varies depending on the supply voltage. See
Electrical Specifications
Writing any value to the COP control register (COPCTL) (see
Control
of the SIM counter. Reading the COP control register returns the low
byte of the reset vector.
The power-on reset (POR) circuit in the SIM clears the SIM counter
4096 × ICLK cycles after power-up.
An internal reset clears the SIM counter and the COP counter.
Freescale Semiconductor, Inc.
For More Information On This Product,
Computer Operating Properly (COP)
Register) clears the COP counter and clears bits 12 through 5
(RSR).).
Go to: www.freescale.com
for ICLK parameters.
Computer Operating Properly (COP)
7.8.2 Reset Status
Section 19.
Figure
Technical Data
16.5 COP
I/O Signals
16-1.
251

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