MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 86
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MC68HC908JL8
Manufacturer Part Number
MC68HC908JL8
Description
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Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JL8.pdf
(288 pages)
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System Integration Module (SIM)
7.2 Introduction
Technical Data
86
7.7
7.7.1
7.7.2
7.8
7.8.1
7.8.2
7.8.3
This section describes the system integration module (SIM), which
supports up to 24 external and/or internal interrupts. Together with the
CPU, the SIM controls all MCU activities. A block diagram of the SIM is
shown in
The SIM is a system state controller that coordinates CPU and exception
timing. The SIM is responsible for:
Freescale Semiconductor, Inc.
•
•
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For More Information On This Product,
Bus clock generation and control for CPU and peripherals
– Stop/wait/reset/break entry and recovery
– Internal clock control
Master reset control, including power-on reset (POR) and COP
timeout
Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Break Status Register (BSR) . . . . . . . . . . . . . . . . . . . . . . . 105
Reset Status Register (RSR) . . . . . . . . . . . . . . . . . . . . . . . 106
Break Flag Control Register (BFCR) . . . . . . . . . . . . . . . . . 108
Figure
System Integration Module (SIM)
Go to: www.freescale.com
7-1.
Figure 7-2
is a summary of the SIM I/O registers.
MC68HC908JL8
MOTOROLA
—
Rev. 2.0