MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 250
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MC68HC908JL8
Manufacturer Part Number
MC68HC908JL8
Description
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Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JL8.pdf
(288 pages)
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Computer Operating Properly (COP)
16.3 Functional Description
Technical Data
250
NOTE:
1. See SIM section for more details.
INTERNAL RESET SOURCES
(COPRS FROM CONFIG1)
COPD (FROM CONFIG1)
RESET VECTOR FETCH
NOTE:
COPEN (FROM SIM)
COPCTL WRITE
COPCTL WRITE
COP RATE SEL
RESET
ICLK
Figure 16-1
The COP counter is a free-running 6-bit counter preceded by the 12-bit
system integration module (SIM) counter. If not cleared by software, the
COP counter overflows and generates an asynchronous reset after
2
select bit, COPRS, in configuration register 1. Writing any value to
location $FFFF before an overflow occurs prevents a COP reset by
clearing the COP counter and stages 12 through 5 of the SIM counter.
Service the COP immediately after reset and before entering or after
exiting stop mode to guarantee the maximum time before the first COP
counter overflow.
18
(1)
Freescale Semiconductor, Inc.
– 2
For More Information On This Product,
Figure 16-1. COP Block Diagram
4
or 2
Computer Operating Properly (COP)
COP MODULE
COP CLOCK
13
Go to: www.freescale.com
shows the structure of the COP module.
12-BIT SIM COUNTER
– 2
COP COUNTER
4
ICLK cycles; depending on the state of the COP rate
6-BIT COP COUNTER
CLEAR
SIM
RESET STATUS REGISTER
MC68HC908JL8
SIM RESET CIRCUIT
MOTOROLA
—
Rev. 2.0