ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 344

• Manufacturer Part Number: ATMEGA2561V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

344
ATmega640/1280/1281/2560/2561
Table 152. Fuse High Byte
Note:
Table 153. Fuse Low Byte
Note:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are
locked if Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the
Lock bits.
Fuse High Byte
OCDEN
JTAGEN
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(1)
1. The SPIEN Fuse is not accessible in serial programming mode.
2. The default value of BOOTSZ1:0 results in maximum Boot Size. See Table 140 on
3. See “WDTCSR – Watchdog Timer Control Register” on page 66 for details.
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of
1. The default value of SUT1:0 results in maximum start-up time for the default clock
2. The default setting of CKSEL3:0 results in internal RC Oscillator @ 8 MHz. See
3. The CKOUT Fuse allow the system clock to be output on PORTE7. See “Clock Out-
4. See “System Clock Prescaler” on page 47 for details.
(3)
(4)
(4)
(3)
page 335 for details.
Lock bits and JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the
clock system to be running in all sleep modes. This may increase the power
consumption.
source. See Table 26 on page 58 for details.
Table 10 on page 39 for details.
put Buffer” on page 46 for details.
Bit No
7
6
5
4
3
2
1
0
Bit No
7
6
5
4
3
2
1
0
Description
Enable OCD
Enable JTAG
Enable Serial Program and Data
Downloading
Watchdog Timer always on
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see Table 157
for details)
Select Boot Size (see Table 157
for details)
Select Reset Vector
Description
Divide clock by 8
Clock output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
Default Value
1 (unprogrammed, OCD
disabled)
0 (programmed, JTAG
enabled)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed,
EEPROM not preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
Default Value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
2549K–AVR–01/07
(2)
(2)
(1)
(2)
(2)
(2)
(1)
(2)