ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 36
ATMEGA2561V
Manufacturer Part Number
ATMEGA2561V
Description
8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA2561V.pdf
(449 pages)
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XMCRB – External Memory
Control Register B
36
ATmega640/1280/1281/2560/2561
• Bit 7– XMBK: External Memory Bus-keeper Enable
Writing XMBK to one enables the bus keeper on the AD7:0 lines. When the bus keeper
is enabled, AD7:0 will keep the last driven value on the lines even if the XMEM interface
has tri-stated the lines. Writing XMBK to zero disables the bus keeper. XMBK is not
qualified with SRE, so even if the XMEM interface is disabled, the bus keepers are still
activated as long as XMBK is one.
• Bit 6:3 – Res: Reserved Bits
These bits are reserved and will always read as zero. When writing to this address loca-
tion, write these bits to zero for compatibility with future devices.
• Bit 2:0 – XMM2, XMM1, XMM0: External Memory High Mask
When the External Memory is enabled, all Port C pins are default used for the high
address byte. If the full 60KB address space is not required to access the External Mem-
ory, some, or all, Port C pins can be released for normal Port Pin function as described
in Table 9. As described in “Using all 64KB Locations of External Memory” on page 31,
it is possible to use the XMMn bits to access all 64KB locations of the External Memory.
Table 9. Port C Pins Released as Normal Port Pins when the External Memory is
Enabled
Bit
(0x75)
Read/Write
Initial Value
XMM2
0
0
0
0
1
1
1
1
XMM1
0
0
1
1
0
0
1
1
XMBK
R/W
7
0
XMM0
0
1
0
1
0
1
0
1
R
6
–
0
# Bits for External Memory Address
8 (Full 56KB space)
7
6
5
4
3
2
No Address high bits
R
5
–
0
R
4
–
0
R
3
–
0
XMM2
R/W
2
0
XMM1
R/W
1
0
Released Port Pins
None
PC7
PC7 - PC6
PC7 - PC5
PC7 - PC4
PC7 - PC3
PC7 - PC2
Full Port C
XMM0
R/W
0
0
2549K–AVR–01/07
XMCRB
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