ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 354

• Manufacturer Part Number: ATMEGA2561V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Reading the Calibration Byte
Parallel Programming
Characteristics
354
ATmega640/1280/1281/2560/2561
The algorithm for reading the Calibration byte is as follows (refer to “Programming the
Flash” on page 348 for details on Command and Address loading):
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte, 0x00.
3. Set OE to “0”, and BS1 to “1”. The Calibration byte can now be read at DATA.
4. Set OE to “1”.
Figure 144. Parallel Programming Timing, Including some General Timing
Requirements
Figure 145. Parallel Programming Timing, Loading Sequence with Timing
Requirements
Note:
PAGEL
(DATA, XA0/1, BS1, BS2)
XTAL1
DATA
BS1
XA0
XA1
1. The timing requirements shown in Figure 144 (i.e., t
Data & Contol
to loading operation.
RDY/BSY
(1)
ADDR0 (Low Byte)
LOAD ADDRESS
PAGEL
XTAL1
(LOW BYTE)
WR
t
t
BVPH
DVXH
(LOW BYTE)
LOAD DATA
DATA (Low Byte)
t
t
XHXL
PHPL
t
t
t
t
t
XLXH
XLDX
PLBX
XLWL
PLWL
t
BVWL
(HIGH BYTE)
LOAD DATA
DATA (High Byte)
t
WLWH
t
XLPH
DVXH
WLRL
LOAD DATA
, t
XHXL
t
PLXH
t
, and t
WLBX
LOAD ADDRESS
XLDX
(LOW BYTE)
2549K–AVR–01/07
ADDR1 (Low Byte)
) also apply
t
WLRH