LPC1752 PHILIPS [NXP Semiconductors], LPC1752 Datasheet - Page 2

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LPC1752

Manufacturer Part Number
LPC1752
Description
32-bit ARM Cortex-M3 MCU up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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NXP Semiconductors
LPC1758_56_54_52_51_2
Objective data sheet
I
I
I
I
Multilayer AHB matrix interconnect provides a separate bus for each AHB master. AHB
masters include the CPU, General Purpose DMA controller, Ethernet MAC (LPC1758
only), and the USB interface. This interconnect provides communication with no
arbitration delays.
Split APB bus allows high throughput with few stalls between the CPU and DMA.
Serial interfaces:
Other peripherals:
N
N
N
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On the LPC1758 only, Ethernet MAC with RMII interface and dedicated DMA
controller.
USB 2.0 full-speed device/Host/OTG controller with dedicated DMA controller and
on-chip PHY for device, Host, and OTG functions. The LPC1752/51 include a USB
device controller only.
Four UARTs with fractional baud rate generation, internal FIFO, DMA support, and
RS-485 support. One UART has modem control I/O, and one UART has IrDA
support.
CAN 2.0B controller with two (LPC1758/56) or one (LPC1754/52/51) channels.
SPI controller with synchronous, serial, full duplex communication and
programmable data length.
Two SSP controllers with FIFO and multi-protocol capabilities. The SSP interfaces
can be used with the GPDMA controller.
Two I
multiple address recognition and monitor mode.
On the LPC1758/56 only, I
output, with fractional rate control. The I
GPDMA. The I
receive as well as master clock input/output.
52 General Purpose I/O (GPIO) pins with configurable pull-up/down resistors and a
new, configurable open-drain operating mode.
12-bit Analog-to-Digital Converter (ADC) with input multiplexing among six pins,
conversion rates up to 1 MHz, and multiple result registers. The 12-bit ADC can be
used with the GPDMA controller.
On the LPC1758/56/54 only, 10-bit Digital-to-Analog Converter (DAC) with
dedicated conversion timer and DMA support.
Four general purpose timers/counters, with a total of three capture inputs and ten
compare outputs. Each timer block has an external count input and DMA support.
One motor control PWM with support for three-phase motor control.
Quadrature encoder interface that can monitor one external quadrature encoder.
One standard PWM/timer block with external count input.
Real-Time Clock (RTC) with a separate power domain and dedicated RTC
oscillator. The RTC block includes 64 bytes of battery-powered backup registers.
Watchdog Timer (WDT) resets the microcontroller within a reasonable amount of
time if it enters an erroneous state.
System tick timer, including an external clock input option.
Repetitive Interrupt Timer (RIT) provides programmable and repeating timed
interrupts.
Each peripheral has its own clock divider for further power savings.
2
C-bus interfaces supporting fast mode with a data rate of 400 kbit/s with
2
Rev. 02 — 11 February 2009
S-bus interface supports 3-wire and 4-wire data transmit and
2
S (Inter-IC Sound) interface for digital audio input or
LPC1758/56/54/52/51
2
S-bus interface can be used with the
32-bit ARM Cortex-M3 microcontroller
© NXP B.V. 2009. All rights reserved.
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