LPC1752 PHILIPS [NXP Semiconductors], LPC1752 Datasheet - Page 34
LPC1752
Manufacturer Part Number
LPC1752
Description
32-bit ARM Cortex-M3 MCU up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.LPC1752.pdf
(71 pages)
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NXP Semiconductors
LPC1758_56_54_52_51_2
Objective data sheet
7.30.1 Reset
7.30 System control
Reset has four sources on the LPC1758/56/54/52/51: the RESET pin, the Watchdog
reset, power-on reset (POR), and the BrownOut Detection (BOD) circuit. The RESET pin
is a Schmitt trigger input pin. Assertion of chip Reset by any source, once the operating
voltage attains a usable level, starts the Wake-up timer (see description in
Section
the oscillator is running, a fixed number of clocks have passed, and the flash controller
has completed its initialization.
When the internal Reset is removed, the processor begins executing at address 0, which
is initially the Reset vector mapped from the Boot Block. At that point, all of the processor
and peripheral registers have been initialized to predetermined values.
Fig 5.
7.29.5), causing reset to remain asserted until the external Reset is de-asserted,
Power distribution
V
DD(REG)(3V3)
V
DD(3V3)
VREFP
VREFN
RTCX1
RTCX2
VBAT
V
V
V
DDA
SSA
SS
Rev. 02 — 11 February 2009
LPC17xx
RTC POWER DOMAIN
ADC POWER DOMAIN
MAIN POWER DOMAIN
OSCILLATOR
SELECTOR
to I/O pads
POWER
32 kHz
3.3 V REGULATOR
LPC1758/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
REGULATOR
ULTRA-LOW
POWER
DAC
ADC
BACKUP REGISTERS
REAL-TIME CLOCK
to core
to memories,
peripherals,
oscillators,
PLLs
002aad978
© NXP B.V. 2009. All rights reserved.
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