LPC1752 PHILIPS [NXP Semiconductors], LPC1752 Datasheet - Page 32

• Manufacturer Part Number: LPC1752
• Description: 32-bit ARM Cortex-M3 MCU up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
LPC1758_56_54_52_51_2
Objective data sheet
7.29.6.3 Power-down mode
7.29.6.4 Deep power-down mode
7.29.6.5 Wakeup interrupt controller
7.29.7 Peripheral power control
The Deep-sleep mode can be terminated and normal operation resumed by either a
Reset or certain specific interrupts that are able to function without clocks. Since all
dynamic operation of the chip is suspended, Deep-sleep mode reduces chip power
consumption to a very low value. Power to the flash memory is left on in Deep-sleep
mode, allowing a very quick wake-up.
On wake-up from Deep-sleep mode, the code execution and peripherals activities will
resume after 4 cycles expire if the IRC was used before entering Deep-sleep mode. If the
main external oscillator was used, the code execution will resume when 4096 cycles
expire. PLL and clock dividers need to be reconfigured accordingly.
Power-down mode does everything that Deep-sleep mode does, but also turns off the
power to the IRC oscillator and the flash memory. This saves more power but requires
waiting for resumption of flash operation before execution of code or data access in the
flash memory can be accomplished.
On the wake-up of Power-down mode, if the IRC was used before entering Power-down
mode, it will take IRC 60 s to start-up. After this 4 IRC cycles will expire before the code
execution can then be resumed if the code was running from SRAM. In the meantime, the
flash wake-up timer then counts 4 MHz IRC clock cycles to make the 100 s flash start-up
time. When it times out, access to the flash will be allowed. Users need to reconfigure the
PLL and clock dividers accordingly.
The Deep power-down mode can only be entered from the RTC block. In Deep
power-down mode, power is shut off to the entire chip with the exception of the RTC
module and the RESET pin.
The LPC1758/56/54/52/51 can wake up from Deep power-down mode via the RESET pin
or an alarm match event of the RTC.
The Wakeup Interrupt Controller (WIC) allows the CPU to automatically wake up from any
enabled priority interrupt that can occur while the clocks are stopped in Deep sleep,
Power-down, and Deep power-down modes.
The Wake-up controller (WIC) works in connection with the Nested Vectored Interrupt
Controller (NVIC). When the CPU enters Deep sleep, Power-down, or Deep power-down
mode, the NVIC sends a mask of the current interrupt situation to the WIC.This mask
includes all of the interrupts that are both enabled and of sufficient priority to be serviced
immediately. With this information, the WIC simply notices when one of the interrupts has
occurred and then it wakes up the CPU.
The Wake-up controller (WIC) eliminates the need to periodically wake up the CPU and
poll the interrupts resulting in additional power savings.
A Power Control for Peripherals feature allows individual peripherals to be turned off if
they are not needed in the application, resulting in additional power savings.
Rev. 02 — 11 February 2009
LPC1758/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
© NXP B.V. 2009. All rights reserved.
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