AM79C973VCW AMD [Advanced Micro Devices], AM79C973VCW Datasheet - Page 166
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AM79C973VCW
Manufacturer Part Number
AM79C973VCW
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C973VCW.pdf
(304 pages)
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BCR5: LED1 Status
BCR5 controls the function(s) that the LED1 pin dis-
plays. Multiple functions can be simultaneously en-
abled on this LED pin. The LED display will indicate the
logical OR of the enabled functions. BCR5 defaults to
Receive Status (RCV) with pulse stretcher enabled
(PSE = 1) and is fully programmable.
Note: When LEDPE (BCR2, bit 12) is set to 1, pro-
gramming of the LED1 Status register is enabled.
When LEDPE is cleared to 0, programming of the
LED1 register is disabled. Writes to those registers will
be ignored.
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16 RES
15
166
RES
COLE
LEDOUT
Name
register when there is receive ac-
tivity on the network.
Reserved location. Written and
read as zeros.
Collision Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network.
Reserved locations. Written as
zeros and read as undefined.
This bit indicates the current
(non-stretched) value of the LED
output pin. A value of 1 in this bit
indicates that the OR of the en-
abled signals is true.
Read/Write accessible always.
RCVE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Read/Write accessible always.
COLE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
The logical value of the LEDOUT
status signal is determined by the
settings of the individual Status
Enable bits of the LED register
(bits 8 and 6-0).
Read accessible always. This bit
is read only, writes have no ef-
fect. LEDOUT is unaffected by
H_RESET, S_RESET, or STOP.
Description
P R E L I M I N A R Y
Am79C973/Am79C975
14
13
12
LEDPOL
LEDDIS
100E
LED Disable. This bit is used to
LED Polarity. When this bit has
the value 0, then the LED pin will
be driven to a LOW level whenev-
er the OR of the enabled signals
is true, and the LED pin will be
disabled and allowed to float high
whenever the OR of the enabled
signals is false (i.e., the LED out-
put will be an Open Drain output
and the output value will be the
inverse of the LEDOUT status
bit).
When this bit has the value 1,
then the LED pin will be driven to
a HIGH level whenever the OR of
the enabled signals is true, and
the LED pin will be driven to a
LOW level whenever the OR of
the enabled signals is false (i.e.,
the LED output will be a Totem
Pole output and the output value
will be the same polarity as the
LEDOUT status bit).
The setting of this bit will not ef-
fect the polarity of the LEDOUT
bit for this register.
Read/Write accessible always.
LEDPOL is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
disable the LED output. When
LEDDIS has the value 1, then the
LED output will always be dis-
abled. When LEDDIS has the val-
ue 0, then the LED output value
will be governed by the LEDOUT
and LEDPOL values.
Read/Write accessible always.
LEDDIS is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
100 Mbps Enable. When this bit
is set to 1, a value of 1 is passed
to the LEDOUT bit in this register
when the Am79C973/Am79C975
controller is operating at 100
Mbps mode.
Read/Write accessible always.
100E is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
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