AM79C973VCW AMD [Advanced Micro Devices], AM79C973VCW Datasheet - Page 259
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AM79C973VCW
Manufacturer Part Number
AM79C973VCW
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C973VCW.pdf
(304 pages)
- Current page: 259 of 304
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5
4
3
2
1
0
Default: 00 Read only, write has no effect.
This two bit field indicates the current power
state of the Am79C975 controller. The defini-
tion of the field values is given below:
RESERVED Default: 0Read as ZERO only
Reserved bits. For future use only
PVALID
effect.
When PVALID is set to a 1, it indicates that
there is an EEPROM connected to the
Am79C975 controller and that the read opera-
tion of the EEPROM has passed the checksum
verification. All registers that are loaded from
the EEPROM contain data read from the EE-
PROM. PVALID is cleared by H_RESET.
RXON
Default: 0
When RXON is set to a 1, it indicates that the
receive function for normal operation is en-
abled. Note that the reception of management
frames via the SMIU is only controlled by the
MRX_ENABLE bit in the Receive Status regis-
ter, but not of the state of RXON. RXON is
cleared by H_RESET.
TXON
Default: 0
When TXON is set to a 1, it indicates that the
transmit function for normal operation is en-
abled. Note that the transmission of manage-
ment frames via the SMIU is always active,
independent of the state of TXON. TXON is
cleared by H_RESET.
STOP
Default: 1
When STOP is set to a 1, it indicates that all
bus master activity of the Am79C975 controller
is disabled. STOP is set to 1 by H_RESET.
STRT
Default: 0
00b - D0
01b - D1
10b - D2
11b - D3
Default: 0Read only, write has no
Read only, write has no effect.
Read only, write has no effect.
Read only, write has no effect.
Read only, write has no effect.
P R E L I M I N A R Y
Am79C973/Am79C975
MIU Transceiver Status (MReg Address 30)
This register is a shadow register of some bits in the
transceiver status register.
Bit No. Name and Description
7:4
3
2
1
0
Control and Status Registers
The following registers control the transmission and re-
ception of management frames and provide status of
the operation.
When STRT is set to a 1, it indicates that the
Am79C975 controller is initialized for normal
mode of operation and that the device is setup
to perform bus master activity. STRT is cleared
by H_RESET.
RESERVED
Default: 0000Read as ZERO only
Reserved bits. For future use only
LINK
Default: 0
When LINK is set to 1, it indicates that the
physical layer interface of the Am79C975 con-
troller is in Link Pass state. A value of 0 indi-
cates a Link Fail state.
DUPLEX
Default: 0
When DULPEX is set to 1, it indicates that the
physical layer interface is operating in full-du-
plex mode. A value of 0 indicates half-duplex
mode.
SPEED
Default: 0
When SPEED is set to 1, it indicates that the
physical layer interface is operating at 100
Mbps. A value of 0 indicates a speed of 10
Mbps.
AUTONEG_DONEDefault: 0Read only, write
has no effect.
When AUTONEG_DONE is set to 1, it indi-
cates that the autonegotiation process of the
physical layer interface with the other end of
the network cable has completed.
Read only, write has no effect.
Read only, write has no effect.
Read only, write has no effect.
259
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