AM79C973VCW AMD [Advanced Micro Devices], AM79C973VCW Datasheet - Page 283
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AM79C973VCW
Manufacturer Part Number
AM79C973VCW
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C973VCW.pdf
(304 pages)
- Current page: 283 of 304
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Alternative Method for
Initialization
APPENDIX D: Alternative Method for Initialization
The Am79C973/Am79C975 controller may be initial-
ized by performing I/O writes only. That is, data can be
written directly to the appropriate control and status
registers (CSR instead of reading from the initialization
block in memory). The registers that must be written
Note:
1. The INIT bit must not be set or the initialization block will be accessed instead.
2. Needed only if SSIZE32 =0.
3. Needed only if the physical address is different from the one stored in EEPROM or if there is no EEPROM present.
APPENDIX D
Control and Status Register
Table 76. Registers for Alternative Initialization Method (Note 1)
CSR24-25
CSR30-31
CSR10
CSR11
CSR12
CSR13
CSR14
CSR15
CSR47
CSR49
CSR76
CSR78
CSR2
CSR8
CSR9
Am79C973/Am79C975
are shown in Table D-76. These register writes are fol-
lowed by writing the START bit in CSR0.
PADR[31:16] (Note 3)
PADR[47:32] (Note 3)
IADR[31:16] (Note 2)
PADR[15:0] (Note 3)
LADRF[31:16]
LADRF[47:32]
LADRF[63:48]
LADRF[15:0]
RXPOLLINT
TXPOLLINT
Comment
RCVRL
XMTRL
BADR
BADX
Mode
283
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