S71GL064A08 SPANSION [SPANSION], S71GL064A08 Datasheet - Page 42

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S71GL064A08

Manufacturer Part Number
S71GL064A08
Description
STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
Manufacturer
SPANSION [SPANSION]
Datasheet

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Command Definitions
40
Reading Array Data
Reset Command
Writing specific address and data commands or sequences into the command register initiates
device operations.
address and data values or writing them in the improper sequence may place the device in
an unknown state. A reset command is then required to return the device to reading array
data.
All addresses are latched on the falling edge of WE# or CE#, whichever happens later. All data
is latched on the rising edge of WE# or CE#, whichever happens first. Refer to the AC Char-
acteristics section for timing diagrams.
The device is automatically set to reading array data after device power-up. No commands
are required to retrieve data. The device is ready to read array data after completing an Em-
bedded Program or Embedded Erase algorithm.
After the device accepts an Erase Suspend command, the device enters the erase-suspend-
read mode, after which the system can read data from any non-erase-suspended sector. After
completing a programming operation in the Erase Suspend mode, the system may once again
read array data with the same exception. See the Erase Suspend/Erase Resume Commands
section for more information.
The system must issue the reset command to return the device to the read (or erase-sus-
pend-read) mode if DQ5 goes high during an active program or erase operation, or if the
device is in the autoselect mode. See the next section, Reset Command, for more
information.
See also Requirements for Reading Array Data in the Device Bus Operations section for more
information. The Read-Only
read parameters, and
Writing the reset command resets the device to the read or erase-suspend-read mode. Ad-
dress bits are don’t cares for this command.
The reset command may be written between the sequence cycles in an erase command se-
quence before erasing begins. This resets the device to the read mode. Once erasure begins,
however, the device ignores reset commands until the operation is complete.
The reset command may be written between the sequence cycles in a program command se-
quence before programming begins. This resets the device to the read mode. If the program
command sequence is written while the device is in the Erase Suspend mode, writing the
reset command returns the device to the erase-suspend-read mode. Once programming be-
gins, however, the device ignores reset commands until the operation is complete.
The reset command may be written between the sequence cycles in an autoselect command
sequence. Once in the autoselect mode, the reset command must be written to return to the
read mode. If the device entered the autoselect mode while in the Erase Suspend mode, writ-
ing the reset command returns the device to the erase-suspend-read mode.
If DQ5 goes high during a program or erase operation, writing the reset command returns the
device to the read mode (or erase-suspend-read mode if the device was in Erase Suspend).
Note that if DQ1 goes high during a Write Buffer Programming operation, the system must
write the Write-to-Buffer-Abort Reset command sequence to reset the device for the next
operation.
Table 10
Figure 13
A d v a n c e
defines the valid register command sequences. Writing incorrect
Operations–“AC Characteristics” section on page 63
S71GL064A based MCPs
shows the timing diagram.
I n f o r m a t i o n
S71GL064A_00_A2 February 8, 2005
provides the

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