S71GL064A08 SPANSION [SPANSION], S71GL064A08 Datasheet - Page 98

• Manufacturer Part Number: S71GL064A08
• Description: STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
• Manufacturer: SPANSION [SPANSION]

Power Savings Modes
96
CE#
Dat a Out
Page A ddr es s
Wor d A ddr es s
(A0 - A3 )
WE#
LB#, UB#
(For 16M Page Mode, 32M and 64M Only)
Partial Array Self Refresh (PAR)
(A4 - A 20)
There are several power savings modes.
The operation of the power saving modes ins controlled by the settings of bits
contained in the Mode Register. This definition of the Mode Register is shown in
Figure 33
power modes as well as enabling Page Mode operation. The Mode Register is set
by using the timings defined in
In this mode of operation, the internal refresh operation can be restricted to a
16Mb, 32Mb, or 48Mb portion of the array. The array partition to be refreshed is
determined by the respective bit settings in the Mode Register. The register set-
Partial Array Self Refresh
Temperature Compensated Refresh (64M)
Deep Sleep Mode
Reduced Memory Size (32M, 16M)
Figure 32. Timing Waveform of Page Mode Write Cycle (ZZ# = V
and the various bits are used to enable and disable the various low
High-Z
t
AS
t
WC
t
LBW,
t
t
WP
A d v a n c e
CW
S71GL064A based MCPs
t
UBW
t
DW
Figure
34.
t
DH
t
PGMAX
t
I n f o r m a t i o n
PWC
t
PDW
t
PDH
t
PDW
S71GL064A_00_A2 February 8, 2005
IH
)
t
PDH